
IXFR80N50Q3
120
100
Fig. 7. Input Admittance
100
80
Fig. 8. Transconductance
T J = - 40oC
80
T J = 125oC
25oC
25oC
- 40oC
60
125oC
60
40
40
20
0
20
0
4.5
5.0
5.5
6.0
6.5
7.0
7.5
8.0
8.5
9.0
9.5
10.0
0
20
40
60
80
100
120
240
V GS - Volts
Fig. 9. Forward Voltage Drop of Intrinsic Diode
16
V DS = 250V
I D - Amperes
Fig. 10. Gate Charge
200
14
12
I D = 40A
I G = 10mA
160
10
120
80
40
0
T J = 125oC
T J = 25oC
8
6
4
2
0
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1.0
1.1
1.2
1.3
1.4
0
40
80
120
160
200
240
280
100,000
f = 1 MHz
V SD - Volts
Fig. 11. Capacitance
1000
Q G - NanoCoulombs
Fig. 12. Forward-Bias Safe Operating Area
R DS(on) Limit
10,000
1,000
Ciss
100
10
100μs
Coss
100
Crss
1
T J = 150oC
T C = 25oC
1ms
Single Pulse
10
0.1
0
5
10
15
20
25
30
35
40
10
100
1,000
V DS - Volts
IXYS Reserves the Right to Change Limits, Test Conditions, and Dimensions.
V DS - Volts